- Combinational and sequential logic for local and remote alarm monitoring and control.
- Timing signal generation.
- Phase Locked Loop (PLL) detector and loop amplifier design.
- Pulse Width Modulation (PWM) control of DC motors.
- Rotary position and angular rate sensing using Incremental Encoders.
- NRZ (Non Return to Zero) and ITU-G703 E1, E2, and E3 digital interface standards.
Requires specialist test equipment.
- Phase Locked Synthesisers using DDS (Direct Digital Synthesis).
Requires specialist test equipment.
- FPGA (Field Programmable Gate Array) design using schematics and VHDL.
Requires specialist software and test equipment.
Previous experience includes the design of a 1-70Mbit/s frequency agile Hitless (error free) Diversity Switch in a Xilinx FPGA.